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Rebellions Bets on Memory-Centric Architecture as it Weighs IPO Options
South Korean AI silicon startup Rebellions is focusing its technology roadmap on memory as it seeks to take advantage of strategic connections with Korean semiconductor giants SK Hynix and Samsung Foundry. The company believes this strategy will be crucial as it explores options for an IPO, Rebellions CEO Sunghyun Park told EE Times. “Rebellions, as a Korean startup, backed by Samsung and SK Hynix, is in a very good position to explore all the options for memory-centric architectures,” Park said. Sunghyun Park (Source: Rebellions) As large-scale LLMs reach deployment, memory capacity and bandwidth are becoming critical to large AI inference accelerator designs like Rebellions’. The company’s second-generation AI accelerator, Rebel, was announced in 2024. Rebel is a scaled-up version of Rebellions’ first-gen CGRA-based accelerator, with four compute chiplets offering 1 POPS of FP16 compute and 144 GB of HBM4e in a 300-W power envelope. Memory is therefore of extreme strategic importance, in terms of both supply chain and economics. The industry is moving away from commodity memories in a number of directions, Park said. Huge KV caches will require a combination of HBM and HBF (high-bandwidth Flash) for capacity, while scale-up and scale-out solutions will require specialized memory architectures and memory pooling. The industry is also exploring custom HBM implementations. The company had planned a 3D SRAM stack for its next-generation architecture, but has switched to 3D-stacked DRAM as part of a collaboration with both SK Hynix and Samsung. Park said Rebellions is working to co-design HBM memory and logic dies; custom HBM could include logic to handle fast token decoding, but the industry is still figuring out which logic to include. “There’s no de facto standard solution yet, so it’s a good time to explore what options we can have in the base die for custom HBM,” he said. Customer base Rebel is commercialized primarily in South Korea and the Middle East today, Park said. Having secured its memory supply chain, Rebellions is receiving significant attention in the Kingdom of Saudi Arabia (KSA) in particular. “Everyone talks about technology, but the most important thing right now is to secure the supply chain,” he said. “The beauty of Rebellions is we can secure all the memory.” Turbulence in the Middle East of late hasn’t dampened the region’s AI infrastructure ambitions, Park said. “Humain is still the same, Aramco is still the same,” he said. “They believe [AI] is not just a trend. It’s their ambition for 2030, and I’m proud to be part of the ecosystem here in Saudi Arabia.” Groq was the main player in this region until recently, Park noted, and changes there have brought the Middle East closer to the Korean ecosystem in search of other hardware candidates. “Sovereign AI [in KSA] means a heterogeneous compute platform where Nvidia and non-Nvidia hardware co-exist, and where U.S. and non-U.S. hardware are installed together,” he said. “Training and inference are not locked in by Nvidia products here, and [we have] a very compelling story.” As well as sovereign deployments, telecoms is the other key market for Rebellions, both in the Middle East and South Korea. “The telecoms industry has money, and they know how to do capex,” Park said. The biggest deployment of Rebellions chips to date is at SK Telecom, where a multi-rack first-gen Rebellions cluster partially powers Adot, SK Telecom’s proprietary AI assistant, which provides Korea-specific services like summarizing phone calls. Adot is the biggest user of tokens in South Korea, Park said, with up to 50 million API calls per day. The companies are currently exploring options for scale-up and scale-out of this cluster. “I’m proud that we have end users for this service; it’s not just infrastructure, it’s a real, live service in Korea,” he said. Rebellions hardware is also deployed in NPU-as-a-service infrastructure by Korea Telecom (KT). Rebellions’ open-source software stack, optimized for Red Hat, is popular with potential U.S. customers, but this is still a growing market for the Korean company, Park said. Rebellions’ hardware has been deployed at both SK Telecom and Korea Telecom. (Source: Rebellions) Chiplet architecture AI silicon startup Cerebras’ huge IPO last month has put new price tags on companies like Rebellions, Park said, and brought investor and customer focus to low-latency inference, which is further intensifying focus on memory technologies and supply chain. While the first big exits in this domain, Groq and Cerebras, both have SRAM-based architectures, the next big winners will be those who use 3D DRAM stacking, Park said. “One year ago we focused on chiplets; chiplet was the magic word,” he said. “Today, the magic word is memory and memory-centric architectures. That’s why [we are getting traction] with financial investors, because we’re uniquely positioned here.” Rebellions recently taped out CXL and Ethernet I/O dies, but plans to sell compute chiplets are still evolving. The industry landscape around chiplets is still moving, Park said, so it’s too soon to decide whether chiplets are a valid go-to-market option for a startup. “Who’s my friend and who’s my enemy in this field?” he said. “Even Nvidia is trying to build its own chiplet ecosystem. Right now, I don’t know what direction [we’ll go in]. I’d like us to be the chiplet player for XPU, but we need to find the right partners and the right packaging partner. It’s very important to understand what’s going on in this ecosystem.” The company collaborates with Marvell on system-level technologies, including optical scale-up (Rebellions is considering co-packaged optics for future generations, Park said, to keep up with customer demands for bigger scale-up domains). Both the AI chip companies that had big exits recently had moved even further up the stack, building out substantial cloud deployments of their own. Would Rebellions consider doing something similar? “It’s an option,” Park said. “API service is good because we can hide all the numbers by abstracting the customer [further] from our silicon, but frankly, we don’t have a specific direction yet because we are still figuring out the tokenomics.” The Korean government has encouraged Rebellions to build its own sovereign data centers, but that would require additional investment, Park said. Rebellions hardware can be used alongside GPUs for decode acceleration, but it can also handle prefill perfectly well, Park said. (Source: Rebellions) The trend for disaggregated inference, where inference workloads are split across different types of more specialized chips, has been amplified by the Nvidia-Groq deal. Park said that while the industry doesn’t yet have a standard approach to disaggregation, Rebellions is working with Arm and SK Telecom on a disaggregation project. In this specific setup, Rebellion’s hardware accelerates the decode stage; Rebellion’s compute chiplets have significant SRAM, in some ways similar to the Groq chip in Nvidia’s disaggregated architecture. “It’s an interesting idea, and the collaboration between Arm, SK Telecom, and Rebellions is working well, but I’m not sure whether disaggregation is the right overall direction in the future,” he said. Rebellions’ current-generation chip, Rebel, has HBM, Park added, so it can also easily handle prefill. Rebellions closed a $400 million pre-IPO round in March, bringing total funding raised to $850 million. The company is talking with its bankers, Park said, but no concrete plans have been made for the IPO just yet. The company is exploring both Nasdaq and domestic listing options, Park said, while another strategic funding round pre-IPO is also an option.

GigaDevice Introduces GD32E512 and GD32E252 MCUs for Optical Modules
Singapore (June 11, 2026) — GigaDevice, a leading semiconductor company specializing inFlash memory,32-bit microcontrollers (MCUs),sensors, andanalog products,has introduced the new GD32E512 and GD32E252 series MCUs specifically designed for optical module applications. As a leading supplier of MCUs for optical module applications, GigaDevice has maintained a strong focus on the optical communication market, continuously aligning its product development with evolving industry requirements and next-generation optical interconnect technologies. Leveraging years of expertise in optical module control solutions, GigaDevice has established a strong position in the market through continuous innovation and close collaboration with industry partners. To further support the advancement of high-speed optical interconnect technologies and expand its optical communication product portfolio, GigaDevice has introduced the new GD32E512 and GD32E252 series MCUs specifically designed for optical module applications. The new products extend GigaDevice’s optical communication MCU portfolio, addressing the diverse requirements of both high-speed and low-speed optical modules while providing highly integrated and application-optimized solutions. Backed by its comprehensive technology portfolio spanning Flash memory, MCUs, analog devices, and sensors, GigaDevice offers fully self-developed and mass-production-ready solutions with high reliability, strong performance, and flexible customization capabilities for a wide range of optical module applications. Eight Years of Innovation in Optical Module MCUs Through continuous technology investment and product innovation, GigaDevice has become one of the key MCU suppliers serving the global optical module industry. As a leading manufacturer of 32-bit general-purpose MCUs, while steadily expanding its business across multiple sectors, GigaDevice’s in-depth advancement in the optical module segment has always kept pace with the evolution of global communication technologies. In 2018, the company made forward-looking investments in the R&D of optical module MCUs and launched its first dedicated MCU, marking a technological breakthrough. It quickly achieved million-unit shipments within the same year of product launch. Driven by dividends from advancing communication technologies and the ongoing refinement of its product portfolio, GigaDevice’s shipments of optical module-specific MCUs hit the ten-million-unit mark in 2022, ranking among the world’s top players and securing full coverage of mainstream optical module and equipment customers at home and abroad. Amid the booming growth of AI computing power and surging demand for high-speed interconnection, GigaDevice GD32 MCUs are now fully compatible with core application scenarios including telecom, data centers, and access networks. The company is further focusing on three cutting-edge technological directions: high-speed pluggable optics, silicon photonics, and and co-packaged optics (CPO)., continuously empowering the industry’s transition to next-generation high-speed networks. GD32E512 Series: Designed for High-Speed Optical Module Applications Targeting the demanding requirements of high-speed optical modules,the GD32E512 series features a high-performance Arm Cortex®-M33 core operating at up to 120 MHz. The series introduces integrated I3C support, enabling high-bandwidth, low-latency, and high-density communication to meet the evolving requirements of next-generation optical modules. The GD32E512 series is available in an ultra-compact 3 × 3 mm package, helping customers optimize PCB space and support the ongoing trend toward higher integration and miniaturization in optical module designs. To further simplify system design, the GD32E512 series integrates a rich set of application-oriented peripherals, including 3× I²C, 1× MDIO, 2× ADC, 4× DAC, 2× comparators (COMP), and 2× operational amplifiers (OPA), providing comprehensive monitoring, control, and management capabilities for high-speed optical module applications. GD32E252 Series: Optimized for Low-Speed Optical Module Applications The GD32E252 series is specifically designed for low-speed optical module applications and is built around the Arm Cortex®-M23 core. Through continuous optimization, the series delivers enhanced analog performance while maintaining a high level of integration, low power consumption, and reliable operation. Designed to address the requirements of access networks, industrial optical communications, and other cost-sensitive optical connectivity applications, the GD32E252 series provides an optimized balance of performance, integration, and efficiency. The devices also feature compact package options, wide-temperature operation, and strong EMC performance, helping customers simplify system design, reduce development complexity, and accelerate time-to-market. Enabling the Future of High-Speed Optical Connectivity The introduction of the GD32E512 and GD32E252 series further expands GigaDevice’s optical communication MCU portfolio, providing optimized solutions for both high-speed and low-speed optical module applications. Together, these products address the evolving requirements of AI data centers, cloud infrastructure, telecommunications networks, and access networks. Looking ahead, GigaDevice will continue to invest in optical communication technologies and expand its application-focused MCU portfolio. Supported by a broad semiconductor product ecosystem and a reliable global supply chain, GigaDevice remains committed to enabling next-generation optical interconnect solutions and supporting the continued growth of AI computing, cloud services, and high-speed networking infrastructure. About GigaDevice GigaDevice Semiconductor Inc. is a global leading fabless supplier. Founded in April 2005, the company has continuously expanded its international footprint and established its global headquarters in Singapore in 2025. Today, GigaDevice operates branch offices across numerous countries and regions, providing localized support at customers’ fingertips. Committed to building a complete ecosystem with major product lines – Flash memory, MCU, sensor, and analog – as the core driving force, GigaDevice can provide a wide range of solutions and services in the fields of industrial, automotive, computing, consumer electronics, IoT, mobile, networking, and communications. GigaDevice has received the ISO26262:2018 automotive functional safety ASIL D certification, IEC 61508 functional safety product certification, as well as ISO9001, ISO14001, ISO45001, and Duns certifications. In a constant quest to expand our technology offering to customers, GigaDevice has also formed strategic alliances with leading foundries, assembly, and test plants to streamline supply chain management. For more details, please visit: www.gigadevice.com _GigaDevice, GD32, and their logos are trademarks, or registered trademarks of GigaDevice Semiconductor Inc. Other names and brands are the property of their respective owners._ COMPANIES:GIGADEVICE SEMICONDUCTOR INC 0 comments

RISC-V Targets Data Centers, Edge AI, Space
As RVA23 becomes globally adopted RISC-V open architecture reaches server maturity. BOLOGNA, Italy — For years, RISC-V open-standard instruction set architecture worked quietly behind the scenes, mostly appearing in microcontrollers, hard drives, and specialized industrial applications. But at this week’s RISC-V Summit Europe 2026 in Bologna, the message to the global tech community was unequivocal: The architecture has matured and now targets data centers, edge AI, and space exploration markets. “RISC-V is now,” said Andrea Gallo, CEO of RISC-V International, during his opening keynote address to a full auditorium. Gallo’s speech showed that RISC-V is close to major commercial growth. According to the SHD Group, RISC-V could reach 33.7% market share across all hardware segments by 2031. (Source: RISC-V International) This growth is especially visible in edge computing and data centers, with markets expected to top $45 billion and $70 billion by the end of the decade. The hardware ecosystem is booming, as startups such as SiFive and Axelera have raised $650 million together, and big companies such as Microsoft are joining as top board members. Year of RVA silicon in the data center A key moment for RISC-V’s use in business came with the official ratification of the RISC-V Server Platform Specification 1.0, based on the RVA23 profile, ratified in 2024. This important step standardizes the hardware, bringing industry-standard boot systems and runtime services, such as UEFI and ACPI 6.6 support, directly to RISC-V. It ensures that system software runs smoothly across different server hardware. “It’s really important because it’s bringing industry standards to RISC-V,” Gallo noted in an interview with EE Times following his keynote. “At the same time, it’s the industry standards that are supporting RISC-V because the ACPI 6.6 officially supports RISC-V now.” This strict standardization is already driving a surge in high-performance chips. Called the “year of the RVA silicon,” 2026 is seeing many companies launch new server-class processors. Both large companies and startups are releasing powerful hardware, such as the SiFive Performance P870D with up to 128 cores, Akeana’s Alpine Test Chip, and NextSilicon’s Arbel server-grade CPU. Source: RISC-V International Epic Semi has launched its Contrail AIX, a superchip that blends 32 RISC-V processor cores with 16 built-in AI cores, reaching up to 75 TOPS. “The server platform is the completion of the first phase,” Gallo explained during the interview. “Starting from RVA23, the server SoC, and then the server platform. And then this incredible number of RVA23 high-performance chips are coming out all this year. This is incredibly exciting for us.” Andrea Gallo (Source: RISC-V International) For hyperscalers and data center operators, RISC-V is a strong alternative to proprietary architectures such as ARM and x86, effectively mitigating the risk of single-vendor lock-in. “The market is so large that there’s room for everyone,” Gallo said. “So it’s not that one is displacing the other, but there’s enough room for everyone for RISC-V to grow into the market.” He stressed that having choices is important for multinational companies and governments working on digital sovereignty. “RISC-V is bringing freedom of choice and freedom from a single vendor,” Gallo added. Big software companies have noticed this change. Canonical’s new Ubuntu 26.04 LTS operating system now fully supports RVA23, making it easier for enterprise teams to manage data centers with diverse hardware. Addressing physical AI at the edge Enterprise servers are a huge market, but the rise of AI is just as transformative. Gallo sees the future going beyond text and image recognition, toward “physical AI” that interacts directly with the real world. “The evolution that we see is that AI initially was inference, so it was recognizing,” Gallo told EE Times. “Then it became agentic, making decisions. And the physical means that you are also activating those decisions in the physical world.” To make physical AI work—whether in a robot adjusting its balance or in remote sensors deployed in the Amazon rainforest—the hardware must use very little power. RISC-V does this with advanced vector and matrix extensions, letting complex AI algorithms run on the same core that handles control software and the operating system. This design approach removes the need to constantly transfer data and weights to a separate neural processing unit, avoiding a slow, power-hungry process known as “memcopy.” “You don’t do memcopies to transfer the data, the weights from the CPU to the NPU, but everything is done on the same core,” Gallo said. “Memcopy means latency because it takes time, and memcopy means power consumption.” By removing this internal data-transfer problem, RISC-V greatly reduces power consumption and enables much smaller chips. This advantage was clear in Beijing, where a humanoid robot using SpacemiT’s K3 RISC-V processor finished a half-marathon. In Brazil, researchers at São Paulo University are using locally made, battery-powered RISC-V microcontrollers to build an “Internet of Trees.” This mesh network can automatically detect illegal logging and forest fires. Reaching the final frontier in space exploration Beyond Earth applications, RISC-V is becoming a key part of the next generation of spaceflight computers. Space is harsh, requiring microprocessors that are highly radiation- and fault-resistant. Historically, the aerospace industry relied heavily on legacy SPARC-based architectures, but an industry-wide pivot to RISC-V is now well underway. To organize this effort, a special RISC-V Space Special Interest Group started at the end of 2025, chaired by representatives from the European Space Agency and E4 Computing. The group was created because the industry needed to adapt the open architecture for space. “Everyone had some questions,” Gallo recalled from a previous space workshop. “How do we configure RISC-V at best for the lunar lander? Or how do we configure RISC-V at best for cloud processing on a satellite? How do we properly isolate the software workloads on a satellite?” Now, the group brings together experts from NASA, Microchip, SiFive, and Frontgrade Gaisler to write strict standards and white papers for these specialized space missions. Major hardware projects are already underway. NASA is working with Microchip and SiFive to test a high-performance spaceflight processor, and the European Commission’s COSMIC7 project is building a 7-nm RISC-V chip designed just for orbit. For older aerospace suppliers such as Frontgrade Gaisler, now moving from SPARC-based LEON processors to new RISC-V-based NOEL chips, the open nature of RISC-V is the main attraction. Aerospace groups need full transparency in their hardware to get safety certifications. “There’s a strong requirement for publicly available specifications for them to be able to own the product, to own their destiny,” Gallo said. “RISC-V is the only alternative to natural evolution.” Mature ecosystem and commercial success The RISC-V ecosystem is evolving quickly, with both strong startup growth and increasing participation from major companies. Gallo sees this as proof that the architecture works. “When you have such successful acquisitions, it means that those companies were doing things really right,” Gallo said, noting the steady stream of new startups launching high-performance chips. The developer community is just as enthusiastic. At RISC-V Summit Europe 2026, developer workshops sold out, with 120 engineers working on hands-on debugging and advanced hardware design challenges. People no longer see RISC-V as just an academic project or a simple embedded controller. The open architecture has clearly matured, supported by standard specs, strong corporate support, and a large software ecosystem. It is now ready for applications ranging from enterprise computing and edge AI to the demanding environment of spaceflight. As Gallo said at the RISC-V Summit Europe 2026, the tech industry no longer needs to ask when RISC-V will arrive. It is already here.

物流リーダーが挑むコストと自動化
ガートナーのVPアナリスト、デビッド・ゴンザレス氏が、サプライチェーン管理における収益性と技術の戦略を語る。

スタートアップRicursive、チップ設計向けのエンドツーエンドAIモデルを開発へ
「我々は決してEDA企業ではない」——Ricursiveの共同創業者がEE Timesに語った。

膨大なAIストレージ需要が新たな「メモリの壁」を生む
AIモデルが数兆パラメータ規模へと拡大するなか、従来のメモリアーキテクチャは容量と効率の制約に直面している。

AIが招くメモリ不足がIT予算を揺るがす
メモリ価格の高騰と供給不足により、IT部門にとってサーバーやPCの調達が一段と難しくなっている。

インドの2035年半導体構想、設計と製造のリーダーシップに照準
インドは2035年に向けて総額1,500億ドルの大胆な半導体戦略を描く。今回が従来と異なる理由とは。

FPGAにおけるロジックと配線のトレードオフを再考する
Efinixの「交換可能なロジック・配線」技術は、消費電力とダイ面積を削減しつつ、メモリ統合とAIエッジ設計の柔軟性向上を狙う。

物理アプリケーションで歯止めなく広がるエンドツーエンドAIへの懸念
犠牲を積み上げてはならない。

XENSIV™ TMRセンサー:磁気センシングの新たな可能性を拓く
インフィニオンのTMR方式XENSIV™センサーが、位置・電流・過電流保護向けに高感度・低ノイズの磁気センシングを実現する仕組みを解説。

チップの「垂直化」に計測技術が追いつかない
チップ技術がZ軸方向へと深化するなか、計測技術は革新を迫られ、さもなければボトルネックとなりかねない。
